A comparison of neural network computation architectures for low-power edge applications
During my master’s at TU Munich I wrote a paper for the Advanced Seminar for VLSI Technology on how to run neural networks on low-power edge devices.
Offloading inference to the cloud adds latency, hurts reliability, and raises privacy concerns, so there is a strong case for running models directly on the device. The paper compares the three main hardware approaches for doing that: classical CPUs, vector processors, and specialized hardware accelerators, and looks at their efficiency and flexibility when running neural network workloads.
You can read the full paper here: PDF
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